Even More Cache

On-Die Hard

L2 cache on-die is far and away the best type of cache to have - both in terms of performance and overclocking. Celerons, Coppermine P3s and K6-IIIs all have on-die cache. You don't need to worry about having any slow memory chips on your slot card, or even slower cache on the motherboard.

With on-die cache, both the cache and the processor core are all on the same die. The cache runs at full processor speed, and you won't be limited by any discrete SRAM chips. Of course, if your Coppermine 600 doesn't want to hit 800MHz, it could still be the cache on the chip that fails, but we'd rather take our chances with on-die cache than discrete SRAM any day. On-die cache has a much higher speed limit than anything that could be placed alongside your chip. As a bonus, on-die cache outperforms motherboard cache and on-slot cache.

The Deschutes (second-generation Pentium II, 333-450) and Mendocino (second-generation Celeron, 300A-533) basically had the same P6 processor core, but both chips had drastically different overclocking results. The Mendocino had the integrated cache while Deschutes relied on external cache. Mendocino produced the great overclockers like the 300A and 366, while Pentium II processors based on Deschutes were relegated to minor bumps in speed.

Drawbacks to on-die?

However, no setup can be "perfect", and on-die cache has its own problems. Putting the cache on the processor increases its complexity. Die size increases, increasing cost, since you can fit fewer processors on each wafer. Additionally, more complex chips are also more prone to failure. It's easier to mess up building a Lamborghini than some Ford Model T, right? The same thing goes for processors - complexity reduces chip yields. Finally, increased transistor counts result in more heat produced by the chip. This leads to lower 'maximum' clock speeds than could be reached by a processor without on-die cache; you can see this illustrated in the difficulty that the K6-III had reaching 450MHz, while the K6-2 hit 500. Celerons are not immune either - 533 is a struggle, while Katmai P3s reached 600.

Part of the reason Intel is having production difficulties with high-end Coppermine P3s is because they are extremely complex processors and minor flaws at 600MHz become critical failures at 933 since those minor flaws will exceed tolerance limits as you ramp up speed. If the chips didn't have the integrated cache, they would be less prone to failure and cheaper to produce. Of course, then they would suffer from the same slow-cache drawbacks that high-speed Athlons suffer from.

This, conveniently enough, brings us to binning.