Thunderbird lives on
The Athlon 1.4GHz is based on the same Thunderbird core released in June of last year, with the only addition being the new multiplier. (14.0x in the case of the 200MHz chip, and 10.5x for the 266MHz part.) Existing motherboards with clock multiplier adjustment shouldn't have any problems with the 200MHz chip; simply set the clock multiplier to 12.5x and you should be okay.
With the release of Athlon 4 last month, the secret is out on the enhancements we'll see in the desktop version of Palomino. The microarchitecture of the core has been redesigned to improve power consumption, while the circuit implementation has been redesigned to reduce circuit drive strength, resulting in smaller transistors that consume less power. For Athlon, the result is a 20% reduction in power consumption; bringing core voltage down to 1.4V (from 1.75V on today's Athlon processors).
In addition to lower power consumption, Palomino will also possess AMD's 3DNow! Professional technology, essentially this is the combination of AMD's previous 3DNow! Extensions with the inclusion of 52 new instructions, giving Athlon 4 full support of Intel's SSE extensions.
One of the primary additions to the new Palomino and Morgan architectures is data prefetching. With it, the processor looks for regular access patterns in memory access, predicts which data will be necessary next, and fetches and places that data into the processor's L2 cache before it's actually needed. This increases processor performance as it essentially reduces the latency of the processor in accessing memory, especially in data-intensive applications that retrieve lots of data.
Another major benefit is the increase in the number of entries in the L1 data translation look-aside buffer (TLB) and the L2 TLB's (both instruction and data TLBs) new exclusive architecture. The TLB stores translated addresses needed by the processor to access main memory. With the increased number of entries implemented in Morgan, the probability of the processor finding the address it needs is increased. If the CPU can't find the address in the TLB, the performance penalty can be pretty significant.
By moving to an exclusive architecture in the L2 TLBs, entries are no longer duplicated between L1 and L2 TLBs, increasing the amount of effective entry space. If you recall, AMD moved to an exclusive cache architecture with Thunderbird, well now they're taking that technology down to the TLBs. This probably won't be as much of a benefit as the addition of hardware prefetch, and again, the performance improvement will be more pronounced in data-intensive applications.
The final additions to Athlon 4 include AMD's PowerNow! technology and an integrated thermal diode for monitoring the temperature of the processor core.