Overclocking the BX6-2
The biggest question on everyone's mind is overclocking - does this board offer anything new over the current king, the BH6? In short, yes! Here's the skinny of it. Abit has taken overclocking yet another step over, by providing clock multipliers from 2x all the way up to 8x! This won't do much good with current CPUs since most are multiplier-locked at the factory. However, it does mean that the BX6 2.0 will likely have support for future processors, and you won't be suffering from a lack of multiplier settings.
The BX6 2 also supports core voltage settings from 1.30v to 2.10v in 0.05v increments, as well as 2.20v and 2.3v for all of you Celeron 300A and 366 overclockers. In addition to multipliers and voltage settings, the BX6-2 also supports the following system bus speeds:
66, 75, 83, 100, 103, 112, 117, 124,129, 133, 138, 143, 148, 153 MHz.
What's more, every clock speed setting other than 66Mhz and 100Mhz support variable 1/3 and ¼ speed PCI clock timings. The PCI Clock runs at a speed of the external clock * fraction. This is important because one of the main problems with overclocking is the sensitivity of the PCI bus. Run a 133Mhz FSB clock at 133Mhz, and the PCI bus speed increases accordingly, to 43.89. At this speed, not many PCI components can function, properly. However, select 133Mhz (1/4), and the PCI bus drops obligingly back down to 33Mhz! One major problem solved!
The BX6 2 also allows you to change the SEL100/66 # Signal and the AGP bus speed. Both of these settings have lately become legacy functions for the following reasons. CPUs used to be clock-locked their native frequency, which activated the SEL100/66 signal to "HIGH." If you change the frequency of the bus, or set the SEL signal to LOW, then you could overclock by multiplier as much as you wished. However, CPUs are now hard-locked in regards to the bus clock - the only way to overclock today's Intel CPUs is by boosting the clock rate, either a Deschutes core (350, 400, 450Mhz) to 112, 124, etc., or a Celeron to 75, 83, 100, and so on.
The AGPCLK/CPUCLK function allows the AGP bus to be clocked at either 2/3 or 1x the bus clock. As you can imagine, the only real functionality is if you have a Celeron that doesn't clock to 100Mhz FSB, and has video errors at 75Mhz or 83Mhz. It would have been excellent if Abit could have included 1/2x dividers for speeds above 100Mhz, where a variable AGP clock would have helped the most.