200MHz front-side bus
462-pin Socket A interface
Large 128K on-chip L1 cache
High-performance 64K exclusive on-chip L2 cache with hardware data prefetch
Fully pipelined superscalar floating point engine
3DNow!™ Professional technology and superscalar MMX™ technology for great multimedia performance
0.18-micron manufacturing process
1.75V core voltage
25.18 million transistors
106mm^2 die size
Our Duron 1GHz CPU
As you can see from the specs above, the Morgan core brings with it a few enhancements. From a performance perspective, the most important of these is the hardware data prefetch. With it, the processor looks for regular access patterns in memory access, predicts which data will be necessary next, and fetches and places that data into the processor's L2 cache before it's actually needed. This increases processor performance as it essentially reduces the latency of the processor in accessing memory, especially in data-intensive applications that retrieve lots of data.
Another major benefit is the increase in the number of entries in the L1 data translation look-aside buffer (TLB) and the L2 TLB's (both instruction and data TLBs) new exclusive architecture. The TLB stores translated addresses needed by the processor to access main memory. With the increased number of entries implemented in Morgan, the probability of the processor finding the address it needs is increased. If the CPU can't find the address in the TLB, the performance penalty can be pretty significant.
By moving to an exclusive architecture in the L2 TLBs, entries are no longer duplicated between L1 and L2 TLBs, increasing the amount of effective entry space. If you recall, AMD moved to an exclusive cache architecture with Thunderbird, well now they're taking that technology down to the TLBs. This probably won't be as much of a benefit as the addition of hardware prefetch, and again, the performance improvement will be more pronounced in data-intensive applications.
AMD's 3DNow! Professional essentially combines AMD's previous 3DNow! Extensions with the inclusion of 52 new multimedia instructions, giving Morgan full support of Intel's SSE extensions.
In addition, the transistor count, die size, and core voltage have been raised for Morgan. While Spitfire contained 25 million transistors, Morgan contains 25.18 million. With the increase in transistors, the die size is increased from 100mm^2 on Spitfire to 106mm^2 on Morgan. Core voltage is increased dramatically, while previous Durons required only 1.60V, today's 1GHz Morgan chip consumes 1.75V. Speaking of voltages, for monitoring core temperature, an onboard thermal diode has been integrated on Morgan.
Finally, the microarchitecture of Morgan has been slightly tweaked to improve power consumption, while the circuit implementation has been redesigned to reduce circuit drive strength, resulting in smaller transistors that consume less power. AMD has also implemented a slightly different layout to reduce power consumption:
Morgan on the left, Spitfire on the right