Introduction

When the Prescott core first appeared on our radar in 2002, only one detail was known: it would be manufactured on a 90nm process. The 180nm Willamette core was still around at the time, so naturally, Prescott sounded like an amazing feat of engineering prowess. As the chip’s forecasted release neared, additional details emerged. It will have a larger L2 cache. Prescott will feature new instructions called PNI (now known as SSE3). Intel will utilize strained silicon technology. You get the picture.

And then, as the release schedule slipped, new tidbits of information started floating around. Intel’s 90nm process runs incredibly hot. The new core might not work on all motherboards. Finally, Prescott is going to be slower than Northwood before it. Wait – could it be? Would Intel actually venture to sacrifice performance on its enhanced NetBurst architecture? What could cause such a thing?

Despite a few untimely delays, Prescott is indeed ready for its primetime debut at 3.4, 3.2, 3.0, and 2.8GHz. The core unquestionably features a number of both new and improved technologies that should, in theory, give it a respectable performance advantage. However, the quest for scalability has incited Intel’s engineering team to make compromises to ensure the architecture’s viability until Tejas, Prescott’s successor, is ready to take the reigns.

The top of Prescott

The bottom of Prescott

Introducing Prescott at 90nm

Advances in lithography make it possible to extend Moore’s Law, which predicts the doubling of the number of transistors on an integrated circuit every couple of years. Thus, the move to 90nm is a particularly significant event. Whereas Northwood’s die measures 146 square millimeters, Prescott is a much slimmer 112. And on top of that, Prescott contains no les than 125 million transistors compared to Northwood’s 55 (though neither comes close to the Pentium 4 Extreme Edition and its 178 million transistors).

Northwood, Prescott, and Extreme Edition

Northwood, Prescott, and Extreme Edition

In order to improve the speed at which electrons move through the core’s transistors, Intel uses what it calls strained silicon technology. In essence, silicon atoms, which naturally arrange themselves in an orderly grid, are stretched to augment drive current, resulting in transistors capable of switching faster. Intel accomplishes this task in two ways – one way benefits negatively charged transistors, while the other improves positively charged transistors. According to Intel’s technical documentation, strained silicon only adds two percent to its total cost for manufacturing each wafer.

Strained silicon