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Matrox Parhelia-512 Preview
May 14, 2002   Tuan GXS Nguyen > [View My Other Articles]
Product Info | User Reviews | Article Images(22) | Image Gallery | Comments | Forum Thread
The Parhelia-512

Specifications

Before reading and comparing the specifications like a laundry list, take a minute to digest some of the features – you’ll be glad you did, as the Parhelia-512 is by no means a conventional piece of hardware.

Parhelia-512

  • True 512-bit GPU
  • 80 million transistors in a 0.15u fabrication process
  • True 256-bit DDR memory interface
  • Up to 20GB/sec. memory bandwidth
  • Up to 256MB DDR unified frame buffer
  • 10-bit Gigacolor Technology

    • 10-bit per channel RGB rendering and output
    • Over one billion simultaneously displayed colors
    • 10-bit precision for 2D, 3D, DVD and video
    • 10-bit frame buffer mode for ARGB (2:10:10:10)
    • 10-bit RAMDACs with full gamma correction

  • AGP host interface designed up to AGP8X

    • Fast Writes supported

  • 8-way parallel DMA streaming engine
  • OpenGL1.3 and DX8.1 compliant


DualHead-HF Display Technology

  • Fourth-generation DualHead
  • Dual integrated 400MHz 10-bit RAMDACs
  • Support for two digital TMDS transmitters
  • Integrated 10-bit high fidelity TV/Video encoder
  • TripleHead desktop
  • 10-bit gamma correction
  • Dual independent, gamma correctable hardware overlays
  • Support for true multi-display under Windows 2000 and XP
  • Hardware accelerated multi-screen OpenGL support


Quad Vertex Shader Array

  • Four vertex shader units (DX8 and higher)
  • Parallel processing of up to 16 vertices
  • 512 instruction on-chip cache
  • 256 constant registers
  • Quad texturing per pixel, per clock cycle
  • 64 super sample texture filtering

    • Dynamic allocation of texture units
    • 8-sample anisotropic and trilinear filtering on 4 dual-textured pixels/clock
    • 16-sample anisotropic filtering on a 4 single-textured pixels/clock


36-stage shader array

  • 4 pixel pipes
  • 4 texturing units per pipe
  • 5 pixel shader stages per pixel pipe
  • Support for up to 10 pixel stages per pass
  • 4 pixels/clock throughput with quad texturing and 5 pixel shader operations


Hardware Displacement Mapping

  • Patent-pending depth-adaptive tessellation for continuous level of detail geometry
  • Vertex texturing for dynamic generation of geometry using texture maps
  • Support for Bezier curves and N-patch (PN-triangle) evaluation


16x Fragment Antialiasing (FAA-16x)

  • 16x super sampling quality on edge pixels only
  • Avoids blurring of internal pixels
  • Low performance overhead
  • Supports for Full Scene Antialiasing (FSAA)



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