AMD sent along the following media advisory, which provides a nice summation of all of today's events and demonstrations:

During executive presentations today, AMD unveiled details about new platform and product initiatives, future processor design philosophies and insights into its manufacturing model. Highlights below include:

AMD Quad-Core Processors:
AMD's code-named "Barcelona" chips - quad-core processors for servers - are on track to ship for revenue in August 2007. AMD demonstrated multiple "Barcelona" performance scenarios underscoring leadership in performance, virtualization, performance-per-watt and investment protection.

AMD CoolCore(tm) Technology power management enhancements, which turn blocks of memory logic off when not in use, will further increase energy efficiency. AMD CoolCore Technology will be incorporated into multi-core products with the introduction of "Barcelona."

True quad-core AMD Phenom(tm) processors will ship in the fourth quarter of 2007; AMD plans to introduce its next-generation 45 nm desktop processors in 2008. AMD plans to bring quad-core to notebooks in 2009 with the first "Fusion" processor family, code-named "Falcon." More detail about this news is below.

New CPU Cores:
AMD shared details about plans for two next-generation CPU cores:
"Bulldozer," for the server and client markets and "Bobcat" for the mobile, ultra-mobile and consumer electronics markets. "Bulldozer" will deliver a dramatic increase in throughput-oriented performance-per-watt, and will be partitioned for future scalability and modularity.

"Bobcat" is designed for maximum energy efficiency and performance-per-watt for next-generation mobile devices, scaling as low as 1 watt.

Future Server & Workstation Technologies:
AMD made further disclosures about the new 45 nm server processor family code-named "Shanghai," which is planned to be introduced in mid-2008. In addition to core improvements on the "Barcelona" design, "Shanghai" will include 6 MB of L3 cache.

AMD will develop chipsets for its next-generation server and workstation platforms in 2009, which will include octal-core processors, code-named "Sandtiger." This platform will feature the introduction of Direct Connect Architecture 2, including HyperTransport 3.0, highly scalable memory and I/O performance. AMD will also offer partner choices in chipsets as part of its next-generation server and workstation platforms.

DESKTOP TECHNOLOGIES and PLATFORMS:
AMD's upcoming 45 nm desktop processor family codenamed "Ridgeback," is planned for a mid-2008 introduction. "Ridgeback" will include 6 MB of L3 cache for increased performance, as well as HyperTransport 3.0, Split Plane, and the new AM2+ socket, which is fully forward- and backward-compatible with existing AM2 motherboards.

AMD released additional specifications for its next-generation platform for desktops, code-named "Leo." Based on the upcoming AMD Phenom processor, RD790 Northbridge and SB700 Southbridge chipsets, and R670 and R680 graphics cards, "Leo" will be introduced in 2008.

Next-Gerneration Notebook Platforms:
AMD released additional specifications for its next-generation platform for notebooks, code-named "Puma." Based on AMD's "Griffin" mobile processor and the mobile "RS780" chipset, the platform will also feature M8X discrete GPUs and additional new technologies. "Puma" is planned to debut in 2008.

The first product from AMD's family of accelerated processors combining CPU and GPU capabilities, code-named "Falcon", is expected in 2009. Optimized for notebook computers, the "Falcon" family will feature up to four CPU cores with an integrated, unified shading architecture and DirectX GPU core for enhanced graphics processing. "Falcon" will be a part of AMD's "Eagle" platform for notebook computing. >

COMMERCIAL CLIENT SOLUTION AND PLATFORMS:
AMD disclosed high-level information about its efforts collectively codenamed "Hardcastle" to combine AMD technology and open industry initiatives to deliver improved performance, manageability, security and stability in commercial client platforms to be delivered in 2008. The "Perseus" desktop platform and the "Puma" notebook platform are initial "Hardcastle" business-class solutions.

Software Directions:
To accelerate the move to a parallel software world, AMD will deliver hardware extensions for software parallelization, called xSP. Through an open specification development process, xSP will enable software developers to harness the capabilities of multi-core processors.

AMD also announced plans to deliver instruction set extensions to accelerate performance for the most performance-hungry workloads, including high-performance computing (HPC), multimedia applications and security.

AMD's Asset Light strategy is at work today:

The R&D alliance with IBM continues to deliver transistor and process innovation for current and future generation technologies, including immersion lithography, ultra-low-k and high-k / metal gate for continued performance-per-watt leadership at 45 nm and 32 nm.

Chartered Semiconductor delivers "Flex" production of 90 nm MPU products today and will transition to 65 nm technology in the second half of 2007.

TSMC provides high-performance graphics/chipset/SoC production on leading edge bulk technology.

Asset Light is evolving to build increased flexibility into AMD production and further insulate against demand fluctuations.

Fab 36 is operating at peak 300 mm wafer efficiency. The success of Fab 36 allows AMD to take a more pragmatic look at capacity and ensure it better aligns with market demand. AMD will slow the ramp of Fab 38, with plans to bring the facility online in mid-2009. The plan will reduce capital costs, while allowing AMD to add incremental capacity to Fab 36 in 2008, if needed.

Barcelona production is on track for volume shipments at launch. AMD has achieved dual-core-equivalent yields on Barcelona production at Fab 36.

For more information, visit: http://www.amd.com/us-en/Corporate/InvestorRelations/0,,51_306_15086,00. html

AMD "Fusion" products will be introduced in 2009 and will integrate what today are multiple separate core components of a computing device. It will deliver maximum energy efficiency and uncompromising performance.

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